1. BGA(ball grid array)
Ball contact display, one of the surface mount type packages. Ball bumps are made on the back of the printed substrate to replace the pins in accordance with the display method, and the LSI chip is assembled on the front of the printed substrate and then sealed with molded resin or potting method. This is also called a bump display carrier (PAC). Pins can exceed 200 and is a type of package used for multi-pin LSIs. The package body can also be made smaller than a QFP (quad side pin flat package). For example, a 360-pin BGA with 1.5mm pin centers is only 31mm square, while a 304-pin QFP with 0.5mm pin centers is 40mm square. And the BGA does not have to worry about pin deformation like the QFP. The package was developed by Motorola in the United States and was first adopted in devices such as portable phones, and is likely to become popular in the United States for personal computers in the future. Initially, the pin (bump) center distance of BGA is 1.5mm and the number of pins is 225. 500-pin BGA is also being developed by some LSI manufacturers. the problem of BGA is the appearance inspection after reflow.
2. BQFP(quad flat package with bumper)
A quad flat package with bumper, one of the QFP packages, has bumps (bumper) at the four corners of the package body to prevent bending of the pins during shipping. U.S. semiconductor manufacturers use this package mainly in circuits such as microprocessors and ASICs. Pin center distance 0.635mm, the number of pins from 84 to 196 or so.
3. Bump solder PGA(butt joint pin grid array) Alias of surface mount PGA.
4. C-(ceramic)
The mark of ceramic package. For example, CDIP means ceramic DIP, which is often used in practice.
5. Cerdip
Ceramic double in-line package sealed with glass, used for ECL RAM, DSP (Digital Signal Processor) and other circuits. Cerdip with glass window is used for UV erasure type EPROM and microcomputer circuits with EPROM inside. The pin center distance is 2.54mm and the number of pins is from 8 to 42.
6. Cerquad
One of the surface mount packages, the ceramic QFP with underseal, is used to package logic LSI circuits such as DSPs. Cerquad with a window is used to package EPROM circuits. Heat dissipation is better than plastic QFPs, allowing 1.5 to 2W of power under natural air cooling conditions. However, the package cost is 3 to 5 times higher than plastic QFPs. Pin center distance is 1.27mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm, etc. The number of pins ranges from 32 to 368.
7. CLCC (ceramic leaded chip carrier)
Ceramic leaded chip carrier with pins, one of the surface mount package, the pins are led from the four sides of the package, in the shape of a ding. With a window for the package of UV erasure type EPROM and microcomputer circuit with EPROM, etc.. This package is also called QFJ, QFJ-G.
8. COB (chip on board)
Chip on board package is one of the bare chip mounting technology, semiconductor chip is mounted on the printed circuit board, the electrical connection between chip and substrate is realized by lead stitching method, the electrical connection between chip and substrate is realized by lead stitching method, and it is covered with resin to ensure reliability. Although COB is the simplest bare chip mounting technology, but its package density is far inferior to TAB and inverted chip soldering technology.
9. DFP(dual flat package)
Double side pin flat package. It is the alias of SOP.
10. DIC(dual in-line ceramic package)
Ceramic DIP (with glass seal) alias.
11. DIL(dual in-line)
DIP alias (see DIP). European semiconductor manufacturers mostly use this name.
12. DIP(dual in-line package)
Double in-line package. One of the cartridge package, the pins are led from both sides of the package, the package material has two kinds of plastic and ceramic. DIP is the most popular cartridge package, applications include standard logic IC, memory LSI, microcomputer circuits, etc.. The pin center distance is 2.54mm and the number of pins ranges from 6 to 64. the package width is usually 15.2mm. some packages with a width of 7.52mm and 10.16mm are called skinny DIP and slim DIP respectively. In addition, ceramic DIPs sealed with low melting point glass are also called cerdip (see cerdip).
13. DSO(dual small out-lint)
An alias for SOP (see SOP). Some semiconductor manufacturers use this name.
14. DICP(dual tape carrier package)
One of the TCP (tape carrier package). The pins are made on an insulating tape and lead out from both sides of the package. Due to the use of TAB (automatic tape carrier soldering) technology, the package profile is very thin. It is commonly used for LCD driver LSIs, but most of them are custom-made. In addition, a 0.5mm thick memory LSI booklet package is under development. In Japan, the DICP is named DTP according to the EIAJ (Electronic Industries and Machinery of Japan) standard.
15. DIP(dual tape carrier package)
The same as above. The name of DTCP in the EIAJ standard.
16. FP(flat package)
Flat package. An alias for QFP or SOP (see QFP and SOP). Some semiconductor manufacturers use this name.
17. flip-chip
Flip-chip. One of the bare-chip packaging technologies in which a metal bump is made in the electrode area of the LSI chip and then the metal bump is pressure-soldered to the electrode area on the printed substrate. The area occupied by the package is basically the same as the size of the chip. It is the smallest and thinnest of all packaging technologies. However, if the coefficient of thermal expansion of the substrate is different from that of the LSI chip, it can react at the joint and thus affect the reliability of the connection. Therefore, it is necessary to reinforce the LSI chip with resin and use a substrate material with approximately the same coefficient of thermal expansion.
18. FQFP(fine pitch quad flat package)
QFP with small pin center distance, usually less than 0.65mm (see QFP). Some conductor manufacturers use this name.
19. CPAC(globe top pad array carrier)
Motorola’s alias for BGA.
20. CQFP(quad fiat package with guard ring)
Quad fiat package with guard ring. One of the plastic QFPs, the pins are masked with a protective resin ring to prevent bending and deformation. Before assembling the LSI on the printed substrate, the pins are cut from the guard ring and made into a seagull wing shape (L-shape). This package is in mass production at Motorola, USA. The pin center distance is 0.5mm, and the maximum number of pins is about 208.
21. H-(with heat sink)
Indicates a mark with heat sink. For example, HSOP indicates SOP with heat sink.
22. pin grid array(surface mount type)
The surface mount type PGA is usually a cartridge type package with a pin length of about 3.4mm, and the surface mount type PGA has a display of pins on the bottom side of the package with a length from 1.5mm to 2.0mm. Since the pin center distance is only 1.27mm, which is half the size of the cartridge type PGA, the package body can be made smaller, and the number of pins is more than that of the cartridge type (250-528), so it is the package used for large-scale logic LSI. The package substrates are multilayer ceramic substrates and glass epoxy resin printing substrates. The production of packages with multilayer ceramic substrates has become practical.
23. JLCC (J-leaded chip carrier)
J-shaped pin chip carrier. Refers to the windowed CLCC and windowed ceramic QFJ alias (see CLCC and QFJ). Some of the semi-conductor manufacturers use the name.
24. LCC (Leadless chip carrier)
Pinless chip carrier. It refers to the surface mount package in which only the electrodes on the four sides of the ceramic substrate are in contact without pins. High-speed and high-frequency IC package, also known as ceramic QFN or QFN-C.
25. LGA (land grid array)
Contact display package. It is a package that has an array of contacts on the bottom side. When assembled, it can be inserted into the socket. There are 227 contacts (1.27mm center distance) and 447 contacts (2.54mm center distance) of ceramic LGAs, which are used in high-speed logic LSI circuits. LGAs can accommodate more input and output pins in a smaller package than QFPs. In addition, due to the low resistance of the leads, it is suitable for high-speed LSI. However, due to the complexity and high cost of making sockets, they are not used much now. The demand for them is expected to increase in the future.
26. LOC(lead on chip)
LSI packaging technology is a structure in which the front end of the lead frame is above the chip and a bumpy solder joint is made near the center of the chip, and the electrical connection is made by stitching the leads together. Compared to the original structure where the lead frame is placed near the side of the chip, the chip can be accommodated in the same size package with a width of about 1mm.
27. LQFP (low profile quad flat package)
Thin QFP refers to QFPs with a package body thickness of 1.4mm, and is the name used by the Japan Electronics Machinery Industry Association in accordance with the new QFP form factor specifications.
28. L-QUAD
One of the ceramic QFPs. Aluminum nitride is used for the package substrate, and the thermal conductivity of the base is 7 to 8 times higher than that of aluminum oxide, providing better heat dissipation. The frame of the package is made of aluminum oxide, and the chip is sealed by potting method, thus suppressing the cost. It is a package developed for logic LSI and can accommodate W3 power under natural air cooling conditions. The 208-pin (0.5mm center pitch) and 160-pin (0.65mm center pitch) packages for LSI logic have been developed and were put into mass production in October 1993.
29. MCM(multi-chip module)
Multi-chip module. A package in which multiple semiconductor bare chips are assembled on a wiring substrate. According to the substrate material, it can be divided into three categories, MCM-L, MCM-C and MCM-D. MCM-L is an assembly that uses the usual glass epoxy resin multilayer printed substrate. It is less dense and less costly. MCM-C is a component using thick film technology to form multilayer wiring with ceramic (alumina or glass-ceramic) as the substrate, similar to thick film hybrid ICs using multilayer ceramic substrates. There is no significant difference between the two. The wiring density is higher than that of MCM-L.
MCM-D is a component that uses thin-film technology to form multilayer wiring with ceramic (alumina or aluminum nitride) or Si and Al as substrates. The wiring density is the highest among the three types of components, but the cost is also high.
30. MFP(mini flat package)
Small flat package. An alias for plastic SOP or SSOP (see SOP and SSOP). The name used by some semiconductor manufacturers.
31. MQFP(metric quad flat package)
A classification of QFPs according to the JEDEC (Joint Electronic Devices Committee) standard. It refers to the standard QFP with a pin center distance of 0.65mm and a body thickness of 3.8mm to 2.0mm (see QFP).
32. MQUAD(metal quad)
A QFP package developed by Olin, USA. The base plate and cover are made of aluminum and sealed with adhesive. It can allow 2.5W~2.8W of power under natural air-cooling condition. Nippon Shinko Kogyo was licensed to start production in 1993.
33. MSP(mini square package)
QFI alias (see QFI), in the early stage of development, mostly called MSP, QFI is the name prescribed by the Japan Electronics Machinery Industry Association.
34. OPMAC(over molded pad array carrier)
Molded resin sealing bump display carrier. The name used by Motorola for molded resin sealing BGA (see BGA).
35. P-(plastic)
Indicates the notation of plastic package. For example, PDIP means plastic DIP.
36. PAC(pad array carrier)
Bump display carrier, alias of BGA (see BGA).
37. PCLP(printed circuit board leadless package)
Printed circuit board leadless package. Pin center distance has two specifications: 0.55mm and 0.4mm. Currently in the development stage.
38. PFPF(plastic flat package)
Plastic flat package. Alias for plastic QFP (see QFP). Some LSI manufacturers use the name.
39. PGA(pin grid array)
Pin array package. One of the cartridge-type packages in which the vertical pins on the bottom side are arranged in a display pattern. Basically, multilayer ceramic substrates are used for the package substrate. In cases where the material name is not specifically indicated, most are ceramic PGAs, which are used for high-speed, large-scale logic LSI circuits. The cost is high. Pin centers are typically 2.54mm apart and pin counts range from 64 to about 447. To reduce cost, the package substrate can be replaced by a glass epoxy printed substrate. Plastic PG A with 64 to 256 pins is also available. There is also a short pin surface mount type PGA (touch-solder PGA) with a pin center distance of 1.27mm. (See surface mount type PGA).
40. Piggy back
Packaged package. A ceramic package with a socket, similar in shape to a DIP, QFP, or QFN. Used in the development of devices with microcomputers to evaluate program verification operations. For example, the EPROM is inserted into the socket for debugging. This package is basically a custom product and is not widely available in the market.
Post time: May-27-2022